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Additional resources for Energy-Efficient Communication Processors: Design and Implementation for Emerging Wireless Systems
Digital HW vs . SW Architecture Design Software Mapping and Compilation A1 AHW DHW DHW DHW ASIC ASIC ASIP ASIP AHW DHW DHW DHW ASIC ASIC ASIP ASIP Hardware Implementation Analog Hardware Digital Software Fig. 5 a General system design flow and b illustrative example for the implementation of the physical layer functionality. Analog/Digital hardware block available at this point, pessimistic assumptions are made. To limit the design complexity, the functional blocks are typically implemented with standard algorithms and floating-point arithmetic.
To enable compiler and simulation support, the ADL and the processor design tool limit the design freedom to a certain extend. Although no clear boundary exists, a general distinction between the following two types of ADLs and processor design tools can be made : (1) ADLs and processor design tools that target a specific customizable processor template. In this case, the architecture and the customization space is rather well defined. Thus, the design freedom in mainly limited to the selection of predefined template customization options.
295539 66. : Methodology for energyflexibility space exploration and mapping of multimedia applications to single-processor platform styles. IEEE Trans. Circuits Syst. Video Technol. (TCSVT) 21(8), 1027–1039 (2011). 2129750 67. In: International Workshop on Field-Programmable Logic and Applications (FPL), pp. 277–285 (2000) 68. : Software-defined radio prospects for multistandard mobile phones. Computer 40(10), 62–69 (2007) 69. : An efficient technique for leakage current estimation in nanoscaled CMOS circuits incorporating self-loading effects.